Static information storage and retrieval – Read/write circuit
Reexamination Certificate
2007-01-16
2007-01-16
Phung, Anh (Department: 2824)
Static information storage and retrieval
Read/write circuit
C365S189020, C365S189050, C365S189120, C365S230020, C365S230040
Reexamination Certificate
active
11142114
ABSTRACT:
Methods and apparatus for a memory device including a burst architecture employ a double bus architecture that is multiplexed onto an output bus. The resulting architecture effectively facilitates doubling throughput without increasing memory device latency.
REFERENCES:
patent: 5732406 (1998-03-01), Bassett
patent: 5877990 (1999-03-01), Kim
patent: 6202120 (2001-03-01), Lang
patent: 6243309 (2001-06-01), Shin
patent: 6580637 (2003-06-01), Pascucci
patent: 2003/0021163 (2003-01-01), Nakazawa et al.
Gallo Girolamo
Imondi Giuliano Gennaro
Naso Giovanni
Vali Tommaso
Leffert Jay & Polglaze P.A.
Luu Pho M.
Micro)n Technology, Inc.
Phung Anh
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