Dual-bit non-volatile memory cell and method of making the same

Details Dual-bit non-volatile memory cell and method of making the same Dual-bit non-volatile memory cell and method of making the same

2008-05-06

2008-05-06

Smith, Zandra V. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S314000, C257S326000, C257S637000

Reexamination Certificate

active

11306737

ABSTRACT:
A non-volatile memory cell having a local silicon nitride layer to control dispersion of hot electrons is disclosed. The dual-bit non-volatile memory cell has a stack of layers including silicon on the surface of a substrate. The stack of layers has at least one first oxide silicon layer and a silicon nitride layer overlying the first oxide silicon layer. An opening is formed in the stack of layers and a gate oxide layer is deposited on the surface of the substrate within the opening. A control gate is formed on the gate oxide layer followed by a second oxide silicon layer overlying the surfaces of the control gate and the stack of layers. A second polysilicon layer is formed overlying the gate oxide layer. Dual split-gates are then formed on the second polysilicon layer.

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