Dual access serial peripheral interface

Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus access regulation

Reexamination Certificate

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C710S110000

Reexamination Certificate

active

06931470

ABSTRACT:
A dual access peripheral interface uses a shared data bus (16) for communication with dual master units (30,32) coupled to a common peripheral device (34). Each master control unit provides a shared subset of control bits to a logic configuration block (48), which combines the control bits in a logic operation to present to the slave peripheral unit (34). The logic configuration block (48) is configured by configuration bits accessible by only one of the master units (30). In this way, both of the master units can access the peripheral at the same time with the logic of the logic configuration block determining the ultimate control of the peripheral.

REFERENCES:
patent: 5023775 (1991-06-01), Poret
patent: 5166678 (1992-11-01), Warrior
patent: 5339443 (1994-08-01), Lockwood
patent: 6496880 (2002-12-01), Ma et al.
patent: 6662253 (2003-12-01), Gary et al.
patent: 2003/0036368 (2003-02-01), Higgs
patent: 2003/0145144 (2003-07-01), Hofmann et al.

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