Dry etching method

Details Dry etching method Dry etching method

2001-07-06

2003-06-10

Gulakowski, Randy (Department: 1746)

Etching a substrate: processes

Gas phase etching of substrate

Etching a multiple layered substrate where the etching...

C216S011000, C216S058000, C216S063000, C216S067000, C216S068000, C216S074000, C216S075000, C216S079000, C438S706000, C438S707000, C438S710000, C438S719000, C438S720000, C438S733000, C438S735000, C438S737000, C438S738000, C438S742000

Reexamination Certificate

active

06576152

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a dry etching method and, more particularly, to improved anisotropic dry etching on a lamination of a silicon base film, a tungsten film, and a tungsten alloy film, which dry etching is adopted mainly in a process of manufacturing a high-performance semiconductor device having a gate width narrower than 0.18 &mgr;m rules.
BACKGROUND OF THE INVENTION
In recent years, semiconductor devices have remarkably grown in performance, and further speedup and reduction in power consumption have been demanded.
For example, in a fine semiconductor device having a gate width narrower than 0.18 &mgr;m rules, for further improvement in performance of transistors, there has been promoted a transition from a conventional N
+
single gate structure to a dual gate structure in which a P
+
electrode is used for a P channel transistor while an N
+
electrode is used for an N channel transistor. On the other hand, for further speedup and reduction in power consumption, reduction in resistance of gate electrodes has been demanded.
Furthermore, in order to secure a margin for alignment between a gate electrode and an adjacent contact region, SAC (Self Align Contact) process has been employed.
As a gate electrode structure that satisfies the above-mentioned demands on the semiconductor device, a poly-metal electrode using tungsten is promising.
A poly-metal electrode is a kind of gate electrode structure, and it is not an ordinary gate electrode comprising only poly-silicon but a gate electrode made by stacking a metal layer such as tungsten on poly-silicon. The poly-metal electrode realizes a lower resistance as compared with the gate electrode comprising poly-silicon alone, whereby speedup and reduced power consumption are achieved. Further, since the poly-metal electrode is consistent with the SAC process, it is suitable for high-density integration.
Hereinafter, a method for fabricating a poly-metal electrode structure will be described with reference to FIGS.
1
(
a
)-
1
(
c
).
Initially, there are successively formed on a semiconductor substrate such as a silicon substrate
11
, a gate oxide film
12
(e.g., 3 nm thick), a poly-silicon (poly-Si) film
13
(e.g., 100 nm thick), a tungsten nitride (WN
x
) film
14
(e.g., 10 nm thick), a tungsten (W) film
15
(e.g., 100 nm thick), and a silicon nitride (SiN) film
16
(e.g., 150 nm thick), in this order. Preferably, the gate oxide film
12
is formed by thermal oxidation, and the poly-Si film
13
is formed by CVD (Chemical Vapor Deposition). Further, the WN
x
, film
14
and the W film
15
are formed by sputtering or CVD, and the SiN film
16
is formed by CVD.
Next, the W film
15
, the WN
x
film
14
, and the poly-Si film
13
are subjected to anisotropic etching, using the SiN film
16
and the resist pattern
17
as masks, in an etching apparatus different from that used for the SiN film
16
, thereby completing a poly-metal structure gate electrode (refer to FIG.
1
(
c
)).
In this structure, the WN
x
film
14
functions as a barrier layer that prevents mutual diffusion between the W film
15
and the poly-Si film
13
, and the SiN film
16
functions as a stopper layer in the SAC process.
Conventionally, as anisotropic etching of tungsten, low-temperature etching using SF
6
gas and high-temperature etching using Cl
2
gas have been carried out, as disclosed in the transactions of JSAP (Japan Society of Applied Physics) annual meetings as follows: 1989 Autumn JSAP annual meeting (Tsujimoto et al., No.2, p.464), 1991 Spring JSAP annual meeting (Kato et al. No.2, p.503, 28p-ZC-14), 1992 Autumn JSAP annual meeting (Iida et al., No.2, p.465, 16a-SK-8), and 1992 Autumn JSAP annual meeting (Hayashi et al., No.2, p.465, 16a-SK-9).
By the way, tungsten (W) has conventionally been used as a material for plugs, interconnections (bit lines) in DRAM, or the like. A typical wiring structure comprises a W layer having a thickness of 300~500 nm, a barrier layer comprising Ti or TiN and placed under the W layer, and a base comprising an oxide film as an inter-layer film.
In this structure, when using SF
6
as a main gas, anisotropic dry etching of W proceeds in a reaction as follows;
W+
6
F→WF
6
↑
The reason why SF
6
gas is used as an etching gas is because the vapor pressure of WF
6
as a reaction product is high (i.e., WF
6
is easy to volatile) and a lot of F radicals are generated, whereby the relatively thick W film can be etched at a practical etching rate (400~600 nm/min).
However, if the etching gas used in the conventional dry etching of W is applied to, as it is, etching of the poly-metal structure shown in
FIG. 1
, the following drawbacks will occur.
Firstly, since the thickness of the W film
15
(100 nm or less) used in the poly-metal structure is less than that of the W layer (300~500 nm) used in the bit line wiring or the like, the etching rate by SF
6
is too high to control.
Secondly, SF
6
cannot perform selective etching of the W film
15
with respect to the underlying poly-Si film
13
and, moreover, the etching rate by SF
6
is higher in the poly-Si film
13
than in the W film
15
. Therefore, in combination with the first problem, etching does not stop in the poly-Si film
13
, and penetrates through the gate oxide film
12
. As the result, a transistor cannot be fabricated.
Further, in the etching process to form the poly-metal electrode structure shown in
FIG. 1
, a vertical etching configuration and a high selectivity with respect to the gate oxide film
12
are demanded. To meet these demands, it is effective to use HBr base gas for etching of the poly-silicon film
13
. However, the HBr base gas is improper as a main gas for etching of the W film
15
because the vapor pressure of WBr
x
is low.
Accordingly, in the etching process to form the poly-metal electrode structure shown in
FIG. 1
, it is difficult to use the same gas for etching of the W and WN
x
films
15
and
14
and for etching of the poly-Si film
13
and, therefore, these etching processes should be carried out under different conditions.
For example, when etching of the poly-metal structure is carried out by the conventional method described above, etching of the W and WN
x
films
15
and
14
should be carried out on a susceptor (a lower electrode serving as a substrate holder in the dry etching apparatus) having a low temperature (about −20° C.) when using SF
6
gas while it should be carried out on a susceptor having a high temperature (100° C. or higher) when Cl
2
gas is used. These temperature ranges are necessary to obtain vertical configurations while suppressing side-etching of the W and WN
x
films. However, if etching of the poly-Si film using HBr base gas is carried out under these temperature ranges, it is difficult to obtain the vertical configuration in either case.
This problem is described in the transaction of 1998 Autumn JSAP annual meeting (Kawakami et al., No.2, p.640, 16p-C-3), and an etching apparatus having plural etching chambers which are adapted to the properties of plural layers to be etched is required for etching to form a poly-metal gate electrode.
Therefore, there are considerable drawbacks in mass production, such as an increase in the initial cost of the etching apparatus, an increase in the failure rate due to the complicated device system, a reduction in the operation rate, and the like.
There is another problem about the selectivity of the underlying poly-Si film while etching the W and WN
x
films. If the selectivity of the poly-Si film is low in etching of the W and WN
x
film, etching does not stop in the poly-Si film and penetrates through the gate oxide film.
In order to increase the selectivity of poly-Si, for example, Japanese Published Patent Application No. Hei.9-82686 discloses a method of mixing oxygen into the etching gas to form a surface oxide film on poly-Si.
However, if the oxygen density is higher than 50% as described in this bulletin, when etching of the W and WN
x
films is completed, a thick oxide film i

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