Dry etching apparatus and method of forming a via hole in an int

Details Dry etching apparatus and method of forming a via hole in an int Dry etching apparatus and method of forming a via hole in an int

1993-05-14

1994-11-08

Breneman, R. Bruce

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156345, B44C 122

Patent

active

053623584

ABSTRACT:
In order to cyclically implement isotropical and anisotropical etching of an interlayer insulator provided in a semiconductor wafer, two variable capacitors are provided for applying RF bias (power) to a triode type dry etching apparatus. The two variable capacitors are controlled such that cyclically, as one of the two capacitors exhibits maximum capacitance thereof, the other capacitor exhibits minimum capacitance thereof. As an alternative to the above, a wafer supporting table provided in a reactive chamber of an electron cyclotron resonance type apparatus, is cyclically supplied with a radio frequency (RF) bias and the ground potential. This cyclic application of the RF bias and the ground potential is controlled by a combination of a pulse generator and an amplitude modulation circuit both coupled to an RF signal generator. The via hole is effectively formed using the cyclic operations of the isotropic and anisotropic etching.

REFERENCES:
patent: 4075583 (1978-02-01), Kershaw
patent: 4585516 (1986-04-01), Corn
patent: 4863549 (1989-09-01), Granwald
patent: 4889588 (1989-12-01), Fior
patent: 4902377 (1990-02-01), Berglund
patent: 5013400 (1991-05-01), Kurasaki
patent: 5116482 (1992-05-01), Setoyama
patent: 5228939 (1993-07-01), Chu
patent: 5250165 (1993-10-01), Berglund

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