Driving circuit of an output buffer stage having a high...

Details Driving circuit of an output buffer stage having a high... Driving circuit of an output buffer stage having a high...

2005-10-21

2008-08-05

Tran, Anh Q (Department: 2819)

Electronic digital logic circuitry

Signal sensitivity or transmission integrity

Output switching noise reduction

C326S026000, C326S087000

Reexamination Certificate

active

07408377

ABSTRACT:
A driving circuit is for an output buffer stage, with high speed and reduced noise induced on the power supply. The driving circuit may include first and second circuit portions, each intended for the generation of a respective driving signal for a corresponding transistor of the buffer stage. Each portion may include a final stage with a complementary pair of MOS transistors inserted between two supply voltage references, and a third MOS transistor having its conduction terminals connected between one of the voltage references and an interconnection node of the complementary pair and receiving, on its control terminal, an activation pulse signal coming from a logic network incorporating at least one delay chain.

REFERENCES:
patent: 5389834 (1995-02-01), Kinugasa et al.
patent: 5430387 (1995-07-01), Bechade et al.
patent: 5804990 (1998-09-01), Popat et al.
patent: 5926651 (1999-07-01), Johnston et al.
patent: 6653873 (2003-11-01), Nguyen
patent: 6720794 (2004-04-01), Seike
patent: 7053679 (2006-05-01), Rho

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