Driving circuit for a shared sense amplifier

Details Driving circuit for a shared sense amplifier Driving circuit for a shared sense amplifier

1985-08-19

1987-12-01

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

For complementary information

365205, 365233, G11C 700

Patent

active

047109017

ABSTRACT:
When any one of memory cells (MC.sub.1R, MC.sub.NR and MC.sub.1L, MC.sub.NL) connected with respective bit lines (3.sub.R, 4.sub.R and 3.sub.L, 4.sub.L) is addressed, the gate potential of a transfer transistor group (7.sub.R, 8.sub.R or 7.sub.L, 8.sub.L) connected with the bit lines on the non-selected side is clamped at bit line precharge voltage, whereby the said transfer transistor group (7.sub.R, 8.sub.R or 7.sub.L, 7.sub.L) is turned off. Thus, the bit lines on the non-selected side are cut off at a high speed from a sense amplifier.

REFERENCES:
patent: 4061954 (1977-12-01), Proebsting et al.
patent: 4233675 (1980-11-01), Karp et al.
patent: 4262341 (1981-04-01), Mogi et al.
patent: 4363111 (1982-12-01), Heightley et al.
patent: 4387448 (1983-06-01), Takemae et al.
patent: 4606010 (1986-08-01), Saito
Smith et al., IEEE Journal of Solid-State Circuits, vol. SC-15, No. 2, Apr. 1980, pp. 184-189.
Barnes et al., IEEE Journal of Solid-State Circuits, vol. SC-15, No. 5, Oct. 1980, pp. 831-839.

Affiliated with

Also associated with

Rating

Driving circuit for a shared sense amplifier does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Driving circuit for a shared sense amplifier, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Driving circuit for a shared sense amplifier will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1935772