Electrical computers and digital data processing systems: input/ – Intrasystem connection – Bus interface architecture
Reexamination Certificate
2005-11-08
2005-11-08
Auve, Glenn A. (Department: 2111)
Electrical computers and digital data processing systems: input/
Intrasystem connection
Bus interface architecture
C710S104000
Reexamination Certificate
active
06963947
ABSTRACT:
A methodology by which a host computer can dynamically rebalance PCI-to-PCI bridges to overcome Operating System/BIOS and Chipset limitations in order to allow multiple level PCI buses. This methodology also allows hot-swappable PCI buses to be added and removed without failure. Additionally this method allows for proper I/O resource allocation where previously alliasing preventing this. The present invention overcomes the limitations of an Operating System, such as Windows 2000 and Windows XP, to allow a PCI bus segment to be added by rebalancing the PCI bus tree and resource requirements as needed in order to fit the new PCI bus segment.
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“PCI Multi-level Rebalance in Windows Longhorn” White Paper, Microsoft Corporation, Noveber 25, 2003.
Ahern Frank W.
Piatetsky Alexei
Auve Glenn A.
Jackson Walker L.L.P.
Klinger Robert C.
TAO Logic Systems LLC
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