Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2005-04-12
2008-08-12
Tran, Anh Q (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S030000, C326S026000
Reexamination Certificate
active
07411422
ABSTRACT:
A high speed serial data communication system includes provisions for the correction of equalization errors, particularly those errors introduced by equalizer non-idealities. The equalization is achieved at the data transmitter, and is based on dynamic current subtraction at the output of a differential pair. When bit time>0, the error current is removed or subtracted from the total driver current, thereby maintaining a constant total current from bit time0to bit time>0. The same result can also be achieved by subtracting current when bit time>0 using field effect transistors of the opposite gender. The error current can be determined empirically from simulation or through feedback using a replica of the driver. The circuits for achieving equalization error correction and the resulting electrical network analysis are shown and described.
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Clements Steven M.
Cox Carrie E.
Cranford, Jr. Hayden C.
Cockburn Joscelyn J.
Driggs, Hogg, Daugherty & Del Zoppo Co., LPA
International Business Machines - Corporation
Lucas James A.
Tran Anh Q
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