Electrical computers and digital data processing systems: input/ – Interrupt processing
Patent
1998-02-25
2000-10-10
Auve, Glenn A.
Electrical computers and digital data processing systems: input/
Interrupt processing
710 48, G06F 948
Patent
active
061311375
ABSTRACT:
An optical memory apparatus, in which an ODC section generates an interruption according to an instruction from an upper system, an ODD section provides drive controls over a memory apparatus according to an interruption by the ODC, and an MPU actuates a timer when an interruption by the ODC is successively generated, invalidates the interruption when a measure time from a time point of generation of a previous interruption until a time point of generation of the last interruption is not over a prespecified period of time, and validates, on the other hand, the interruption when the time measured by the timer is over the prespecified period of time.
REFERENCES:
patent: 5588125 (1996-12-01), Bennett
patent: 5896540 (1999-04-01), Asano et al.
patent: 5983330 (1999-11-01), Miwa et al.
Imamura Kiyomi
Ohtsuka Masaoki
Yamakawa Teruji
Auve Glenn A.
Fujitsu Limited
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