Drive circuit for a non-volatile semiconductor storage configura

Electronic digital logic circuitry – Interface – Current driving

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326 80, 36518911, G11C 700, H03K 190175

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06137315&

ABSTRACT:
A drive circuit for a non-volatile semiconductor storage configuration. The drive circuit having a level converter circuit which applies an output value and a complementary output value complementary to the output value to a bit line and/or a word line of the semiconductor storage configuration. The drive circuit also has a latch circuit that temporarily stores the data to be stored in the semiconductor storage configuration, and lies between an input circuit and the level converter circuit.

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"A 0.5 .mu.m CMOS Technology for Multifunctional Applications with Embedded FN-Flash Memory and Linear R and C Modules", Roland Heinrich et al., International Electron Devices Meeting, 1993, Washington, DC, pp. 445-448.
"An Experimental 4-Mbit CMOS EEPROM with a NAND-Structured Cell", Masaki Momodomi et al., IEEE Journal of Solid-State Circuits, Oct. 1989, No. 5, New York, pp. 1238-1243.

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