Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1996-05-13
1997-11-25
Tran, Minh-Loan
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257603, 257605, 257606, H01L 2976
Patent
active
056915586
DESCRIPTION:
BRIEF SUMMARY
FIELD OF THE INVENTION
The present invention relates to a diode, in particular a drift-free avalanche breakdown diode. An avalanche breakdown diode constructed on a p-type substrate is already known, the anode being formed by a highly p-doped trough, into which a very highly p-doped region is introduced, and the highly p-doped region being connected to a voltage supply. The cathode is formed by a highly doped n-type region, which is underlaid by a highly p-doped region and is introduced into the p-type substrate. The highly n-doped region is connected to a positive voltage.
SUMMARY OF THE INVENTION
The arrangement according to the present invention has the advantage that the drift of the breakdown voltage is minimized. This is achieved by preventing the breakdown from taking place in the vicinity of the surface of the p-type substrate. The process for producing an avalanche breakdown diode according to the present invention also has the advantage that the p-doped layer and the p-doped trough are automatically adjusted with respect to one another. In this case, the interspace between the highly doped p-type trough and the highly p-doped layer is established exactly by the production process. This leads to a small resistance during the breakdown of the avalanche breakdown diode. Consequently, this avalanche breakdown diode is suitable as an accurate voltage reference. It is particularly advantageous to produce the insulating according to the present invention from silicon oxide. An advantageous selection of the material for the conductive layer according to the present invention is the use of polysilicon.
The avalanche breakdown diode according to the present invention also can be produced advantageously in the form of an inverse conductivity structure, that is to say arranging p-type material instead of n-type material. Consequently, the use of the avalanche breakdown diode is independent of the semiconductor processes used.
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows an integrated avalanche breakdown diode according to the present invention.
FIG. 2 shows doping profiles according to the present invention.
FIG. 3 shows a first ion implantation according to the present invention.
FIG. 4 shows two diffused regions according to the present invention.
FIG. 5 shows a second ion implantation according to the present invention.
FIG. 6 shows a further diffused region according to the present invention.
FIG. 7 shows a third implantation according to the present invention.
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a p-type substrate 1, into which a highly p-doped trough 3 is introduced. A very highly p-doped first region 4 is arranged in turn in the trough 3. In addition to the trough 3, a highly n-doped second region 6 is introduced. The second region 6 is underlaid by a highly p-doped layer 2. The layer 2 and the trough 3 are separated by an interspace 5 which has a precisely defined width. The interspace 5 is filled by the p-type substrate 1. An insulating layer 7 is arranged over the interspace 5. A conductive layer 8 is applied to the insulating layer 7. The conductive layer 8 and the second region 6 are connected to a second potential, a positive voltage. The first region 4 is connected to a first potential, a negative voltage.
Arranging n-doped material instead of p-doped material, that is to say constructing the avalanche breakdown diode with the aid of an inverse conductivity structure, is self-evident to a person skilled in the art.
In this exemplary embodiment, 1.5.times.10.sup.20 ions per cm.sup.3 were selected for the doping of the highly n-doped second region 6. In this case, the doping depth is 0.4.times.10.sup.-6 m. A doping of 2.times.10.sup.17 ions per cm.sup.3 was selected for the highly p-doped trough 3 and the highly p-doped layer 2, the doping depth being 1.6.times.10.sup.-6. The very highly p-doped first region 4 has a doping of 4.times.10.sup.19 ions per cm.sup.3, the doping depth being 0.6.times.10.sup.-6 m.
The arrangement according to FIG. 1 functions as follows: when
REFERENCES:
patent: 5276350 (1994-01-01), Merrill et al.
patent: 5434442 (1995-07-01), Lesk et al.
Y. Hayashi et al., "Insulated Gate Avalanche Transistor", Japanese Journal of Applied Physics, Supplements, Bd. 43, 1974, Tokyo JA, pp. 437-441.
Patent Abstracts of Japan, vol. 9, No. 240 (E-345) (1963) 26 Sep. 1985 & JPA 60 092 674 (Roomu K.K.) 24 May 1985, Moriwake.
Robert & Bosch GmbH
Tran Minh-Loan
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