Drift compensation system and method in a clock device of an...

Details Drift compensation system and method in a clock device of an... Drift compensation system and method in a clock device of an...

2008-01-22

2008-01-22

Liu, Shuwang (Department: 2611)

Pulse or digital communications

Synchronizers

Phase displacement, slip or jitter correction

C375S376000, C375S327000, C375S354000

Reexamination Certificate

active

07321648

ABSTRACT:
A drift compensation system includes a first clock phase alignment circuit adapted for providing an output clock signal which is frequency locked to an input reference clock signal; a second clock phase alignment circuit identical to the first clock phase alignment circuit but wherein the reference clock signal is the output clock signal provided by the first clock phase alignment circuit; first deviation means at the output of the first clock phase alignment circuit for providing a first deviation between its current clock phase and its initial clock phase; second deviation means at the output of the second clock phase alignment circuit for providing a second deviation between its current clock phase and its initial clock phase; and a phase control logic adapted for providing first phase shift signals as inputs to the first clock phase alignment circuit in order to cancel the phase shift between the output clock signal and the reference clock signal in response to the difference between the first and the second deviations.

REFERENCES:
patent: 6664827 (2003-12-01), O'Leary et al.
patent: 6864734 (2005-03-01), Okamura
patent: 6877103 (2005-04-01), Kuo et al.
patent: 2004/0264619 (2004-12-01), Bonaccio et al.

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