DRAM testing method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing

Reexamination Certificate

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Details

C714S006320, C714S719000, C365S201000, C702S117000, C702S119000

Reexamination Certificate

active

08046644

ABSTRACT:
A method for testing a dynamic random access memory (DRAM) includes copying a test program from the DRAM to a random access memory (RAM). Start and end physical addresses of the DRAM are respectively stored in first and second registers. First test data is written to the start physical address, and second test data is read from the start physical address. The method further includes determining whether the second test data is the same as the first test data. A fixed value is added to the start physical address to obtain a next start physical address if the second test data is the same as the first test data. The method further includes determining whether the next start physical address is less than the end physical address. A test success result is returned if the next start physical address is not less than the end physical address.

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patent: 2009/0100305 (2009-04-01), Jan et al.
patent: 2009/0125762 (2009-05-01), Wang

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