DRAM repair apparatus and method

Details DRAM repair apparatus and method DRAM repair apparatus and method

1997-07-11

2000-04-04

Nelms, David

Static information storage and retrieval

Read/write circuit

Bad bit

365210, 36523006, G11C 700

Patent

active

060469455

ABSTRACT:
An apparatus and method for minimizing the access time incurred when accessing redundant columns of a dynamic random access memory (DRAM) is herein disclosed. A pair of redundant columns is associated with a defective column. Each pair of redundant columns has a single redundant column decoder that provides access to the column data in the pair of redundant columns. The redundant column decoder is enabled by the column repair circuitry when it receives a column address signal indicating that a defective cell is to be accessed. When a defective column is accessed, the column data from the pair of associated redundant columns is read onto the IO lines as well as the data from the defective column. The three voltages are combined forming an IO signal and the complements of the three voltages are combined forming an IO-BAR signal. The sense amplifier determines the column data value based on the differential between the IO and IO-BAR signals. When the IO signal has a higher voltage than the IO-BAR signal, the column data value is determined to be a one. When the IO-BAR signal has a higher voltage than the IO signal, the column data value is determined to be a zero.

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patent: 5487040 (1996-01-01), Sukegawa et al.
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