DRAM memory with a shared sense amplifier structure

Details DRAM memory with a shared sense amplifier structure DRAM memory with a shared sense amplifier structure

2005-07-05

2005-07-05

Mai, Son (Department: 2818)

Static information storage and retrieval

Read/write circuit

Flip-flop used for sensing

C365S207000, C365S208000, C365S230030

Reexamination Certificate

active

06914837

ABSTRACT:
A RAM memory with a shared sense amplifier structure, in which sense amplifiers are arranged in strips between two adjacent cell blocks and are configured as differential amplifiers. In an exemplary embodiment, a one of four bit line pairs of the two adjacent cell blocks can be selected for connection to a sense amplifier at any one time using respective isolation transistor pairs, in response to a connection control signal fed to the latter. A signal sent on a word line coupled to a memory cell associated with the selected bit line pair, provides access to the memory cell by the sense amplifier.

REFERENCES:
patent: 5016224 (1991-05-01), Tanaka et al.
patent: 6377504 (2002-04-01), Hilbert
patent: 6449182 (2002-09-01), Ooishi
patent: 0 892 409 (1999-01-01), None

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