DRAM memory cell and method of manufacturing the same

Details DRAM memory cell and method of manufacturing the same DRAM memory cell and method of manufacturing the same

2008-01-22

2008-01-22

Ho, Tu-Tu (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S306000, C257SE21019, C257SE21649, C257SE27086, C438S253000

Reexamination Certificate

active

11352179

ABSTRACT:
A DRAM memory cell includes a semiconductor substrate, an interlayer dielectric having storage node contact plugs that is formed on the semiconductor substrate, and storage node electrodes that are formed on the interlayer dielectric to contact the storage node contact plugs. The storage node contact plugs are formed such that an entrance portion is formed to be larger in linewidth than a contacting portions, and they are formed in gaps between the bit line structures. From a plan view perspective, the storage node electrodes of one column are offset from the storage node contact plugs in an adjacent column, such that the storage node electrodes are in a diagonal arrangement throughout the semiconductor substrate.

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patent: 2001-0036183 (2001-05-01), None
English language abstract of Korean Publication No. 2001-0036183.

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