DRAM memory cell and memory cell array with fast read/write...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S300000, C257S301000, C257S303000

Reexamination Certificate

active

06979853

ABSTRACT:
The memory cell according to the invention has a vertical selection transistor, via whose channel region the inner electrode of the trench capacitor can be connected to a bit line. The large extent of the channel region in the bit line direction means that the trench capacitor can be rapidly charged and read. The channel region is led to the bit line through an associated word line, which completely or partially encloses the channel region. A conductive channel can be formed within the channel region depending on the potential of the word line.

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patent: 19954867 (2000-12-01), None
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patent: 00/75984 (2000-12-01), None

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