DRAM including a reduced storage capacitor

Details DRAM including a reduced storage capacitor DRAM including a reduced storage capacitor

2008-11-22

2009-06-23

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Systems using particular element

Capacitors

C365S189150, C365S189160, C365S189170, C365S207000

Reexamination Certificate

active

07551474

ABSTRACT:
A reduced storage capacitor is used for shrinking a memory cell in DRAM, and local bit line is divided into short line for reducing parasitic capacitance. For reading, a first reduced swing amplifier as a local sense amp reads the memory cell through the local bit line, and a second reduced swing amplifier as a global sense amp reads the local sense amp through a global bit line. With the multi-stage sense amps, time domain sensing scheme is realized such that a voltage difference in the local bit line is converted to a time difference, for differentiating high data and low data, and also fast read operation is realized. And write operation is executed by a reduced swing write driver. With reduced voltage swing, pseudo negative word line scheme is realized for retaining data, and power consumption is reduced. In addition, various alternative circuits and memory cell structures are implemented.

REFERENCES:
patent: 5715189 (1998-02-01), Asakura
patent: 6426905 (2002-07-01), Dennard et al.
patent: 6456521 (2002-09-01), Hsu et al.
patent: 2003/0002349 (2003-01-01), Pilo et al.
A hierarchical bit-line architecture with flexible redundancy and block compare test for 256 Mb DRAM in VLSI Circuits, Digest of Technical Papers, May 1993.
A 322 MHz Random-Cycle Embedded DRAM With High-Accuracy Sensing and Tuning, IEEE Journal of Solid-State Circuits, vol. 40, No. 11, Nov. 2005.
A 500MHz Random Cycle 1.5ns-Latency, SOI Embedded DRAM Macro Featuring a 3T Micro Sense Amplifier, IEEE International Solid-State Circuits Conference, pp. 486, 2007.

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