Dram having deeper source drain region than that of an logic...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S384000, C257S390000, C257SE27084, C257SE27102, C257SE21646, C257SE21660, C257SE21662, C257SE21678, C257SE21683, C257SE21691, C257SE27108, C257S069000, C257S296000, C257S297000, C257S369000, C257S371000, C257S374000, C438S306000

Reexamination Certificate

active

07911005

ABSTRACT:
A semiconductor device having a DRAM region and a logic region embedded together therein, including a first transistor formed in a DRAM region, and having a first source/drain region containing arsenic and phosphorus as impurities; and a second transistor formed in a logic region, and having a second source/drain region containing at least arsenic as an impurity, wherein each of the first source/drain region and the second source/drain region has a silicide layer respectively formed in the surficial portion thereof, and the first source/drain region has a junction depth which is determined by phosphorus and is deeper than the junction depth of the second source/drain region.

REFERENCES:
patent: 6004842 (1999-12-01), Ikemasu et al.
patent: 2001-127270 (2001-05-01), None
patent: 2005-116582 (2005-04-01), None

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