Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Patent
1997-07-30
1999-03-02
Martin-Wallace, Valencia
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
257 68, 257296, 257758, H01L 2900
Patent
active
058775226
ABSTRACT:
In an open-bit-line type COB structure DRAM, two adjacent rectangular device formation regions included in two different but adjacent rectangular device formation region arrays, respectively, are staggered in a bit line direction along the long side of each rectangular device formation region by one third (2 F) of a pitch (6 F) of the rectangular device formation region in the bit line direction. Two local interconnections connected through local contact holes to source/drain diffused layers formed in opposite end portions of each rectangular device formation region, are provided in parallel to a word line. Bit lines each connected through a bit contact hole to a source/drain diffused layer formed in a center portion of each rectangular device formation region, are located with a pitch of 2 F. A capacitor formed at a level higher than that of the bit line is connected through a capacitor contact hole to an end positioned above a field oxide film, of a corresponding local interconnection. Thus, the cell size of the open-bit-line type COB structure memory cells can be made to 6 F.sup.2.
REFERENCES:
patent: 5172202 (1992-12-01), Kazuo
T. Ema et al., "3-Dimensional Stacked Capacitor Cel for 16 M and 54 M Drams", pp. 592-595.
M. Sakao et al., A Capacitor-Over-Bit-Line (COG) cell with a Hemispherical-Grain Storage Node for 64Mb DRAMs, pp. IEDM 90-655-IEDM 90-658.
Martin-Wallace Valencia
NEC Corporation
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