DRAM cell with buried collar and self-aligned buried strap

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S301000

Reexamination Certificate

active

06974991

ABSTRACT:
In a DRAM cell having a trench, a cell capacitor and a cell transistor, a node conducting element connects the cell capacitor to the cell transistor and a collar is disposed about the node conducting element. The collar is disposed in the substrate at least partially, up to entirely outside of the trench. Because the collar is disposed in the substrate outside of the trench, it does not restrict the size of the trench opening. This enables sub-100 nm trenches, using techniques which are compatible with contemporary DRAM process steps. A strap is embedded into a top surface of the collar.

REFERENCES:
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patent: 6190988 (2001-02-01), Furukawa et al.
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patent: 6555430 (2003-04-01), Chudzik et al.
patent: 6583462 (2003-06-01), Furukawa et al.
patent: 6599798 (2003-07-01), Tews et al.
patent: 2002/0105019 (2002-08-01), Mandelman et al.
patent: 2002/0106857 (2002-08-01), Jammy et al.

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