DRAM cell having an annular signal transfer region

Details DRAM cell having an annular signal transfer region DRAM cell having an annular signal transfer region

1998-12-04

2000-11-07

Tran, Minh Loan

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257301, 257302, H01L 27108, H01L 2976, H01L 31119, H01L 2994

Patent

active

06144054&

ABSTRACT:
A memory device formed in a substrate having a trench with side walls formed in the substrate. The device includes a bit line conductor and a word line conductor. A signal storage node has a first electrode, a second electrode formed within the trench, and a node dielectric formed between the first and second electrodes. A signal transfer device has: (i) an annular signal transfer region with an outer surface adjacent the side walls of the trench, an inner surface, a first end, and a second end; (ii) a first diffusion region coupling the first end of the signal transfer region to the. second electrode of the signal storage node; (iii) a second diffusion region coupling the second end of the signal transfer region to the bit line conductor; (iv) a gate insulator coating the inner surface of the signal transfer region; and (v) a gate conductor coating the gate insulator and coupled to the word line. A conductive connecting member couples the signal transfer region to a reference voltage to reduce floating body effects.

REFERENCES:
patent: 4833516 (1989-05-01), Hwang et al.
patent: 4890145 (1989-12-01), Malhi
patent: 4914628 (1990-04-01), Nishimura
patent: 5008214 (1991-04-01), Redwine
patent: 5177576 (1993-01-01), Kimura et al.
patent: 5225697 (1993-07-01), Malhi et al.
J. A. Mandelman et al., "Floating-Body Concerns For SOI Dynamic Random Access Memory (DRAM)," IEEE International SOI Conference Proceedings, pp. 136-137 (Oct. 1996).

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