Dram cell design with folded digitline architecture and...

Details Dram cell design with folded digitline architecture and... Dram cell design with folded digitline architecture and...

2008-01-30

2009-11-03

Ho, Hoai V (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S069000, C365S149000, C365S206000

Reexamination Certificate

active

07613025

ABSTRACT:
The present invention is generally directed to a DRAM cell design with folded digitline sense amplifier. In one illustrative embodiment, a memory array having a plurality of memory cells having an effective size of 6 F2is disclosed which has a plurality of dual bit active areas, each of the active areas having a substantially longitudinal axis, and a plurality of digitlines on a 3 F-pitch arranged in a folded digitline architecture, wherein the active areas are positioned such that the longitudinal axis of the active areas is oriented at an angle with respect to a centerline of the digitlines.

REFERENCES:
patent: 6243311 (2001-06-01), Keeth
patent: 6671217 (2003-12-01), Takemura et al.
patent: 6809364 (2004-10-01), Matsuoka et al.
patent: 6861691 (2005-03-01), Tran
patent: 2007/0049015 (2007-03-01), Nejad et al.

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