DRAM array with gridded sense amplifier power source for enhance

Details DRAM array with gridded sense amplifier power source for enhance DRAM array with gridded sense amplifier power source for enhance

1998-12-04

2000-08-29

Nelms, David

Static information storage and retrieval

Read/write circuit

Bad bit

365226, 3652257, 36518905, G11C 700

Patent

active

061117978

ABSTRACT:
An apparatus for the supply of power to a gridded array of sense amplifier circuits contained within a memory, e.g., a DRAM, is provided. When the column sensed is operating normally the power source supplies a first voltage to the sense amplifier circuits so that they properly latch the state of an addressed memory cell. When a column has been repaired out the apparatus is capable of driving the sense amplifier circuits with a second voltage so that they are prevented from latching the state of an addressed memory cell, thus avoiding the problems attributable to short circuits between bit and word lines and between the cell plate and bit lines of a memory cell array.

REFERENCES:
patent: 5042011 (1991-08-01), Casper et al.
patent: 5280205 (1994-01-01), Green et al.
patent: 5627785 (1997-05-01), Gilliam et al.
patent: 5742549 (1998-04-01), Ochoa et al.

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