Static information storage and retrieval – Read/write circuit – Signals
Patent
1997-01-09
1998-06-02
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Signals
36518905, 36523008, 365233, 3652385, G11C 700
Patent
active
057611378
ABSTRACT:
A data latching mechanism uses Column Address Strobe (CAS) signals to effect one-cycle DRAM page-mode access at high operation frequency.
REFERENCES:
patent: 4044330 (1977-08-01), Johnson et al.
patent: 4792929 (1988-12-01), Olson et al.
patent: 4797850 (1989-01-01), Amitai
patent: 4924441 (1990-05-01), Inskeep
patent: 5173878 (1992-12-01), Sakui et al.
IBM Technical Disclosure Bulletin; vol. 33, No. 10A, pp. 149-151, "Three-Cycle Pipeline for High Performance SRAM Macros" (Mar. 1991).
Technical Digest (AT&T Technologies); No. 77, p. 47; "Memory Addressing Arrangement" (Oct. 1985).
Johnson William Michael
Kromer Stephen Charles
Tran Thang
Advanced Micro Devices , Inc.
Balconi-Lamica Michael J.
Drake Paul S.
Yoo Do Hyun
LandOfFree
DRAM access system and method does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with DRAM access system and method, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and DRAM access system and method will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1468840