Drain extended PMOS transistor with increased breakdown voltage

Details Drain extended PMOS transistor with increased breakdown voltage Drain extended PMOS transistor with increased breakdown voltage

2007-08-28

2007-08-28

Cao, Phat X. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S409000, C257SE29021, C438S197000

Reexamination Certificate

active

11047418

ABSTRACT:
A semiconductor device (102) that includes a drain extended PMOS transistor (CT1a) is provided, as well as fabrication methods (202) therefore. In forming the PMOS transistor, a drain (124) of the transistor is formed over a region (125) of a p-type upper epitaxial layer (106), where the region (125) of the p-type upper epitaxial layer (106) is sandwiched between a left P-WELL region (130a) and a right P-WELL region (130b) formed within the p-type upper epitaxial layer (106). The p-type upper epitaxial layer (106) is formed over a semiconductor body (104) that has an n-buried layer (108) formed therein. This arrangement serves to increase the breakdown voltage (BVdss) of the drain extended PMOS transistor.

REFERENCES:
patent: 5043788 (1991-08-01), Omoto et al.
patent: 5852314 (1998-12-01), Depetro et al.
patent: 5976942 (1999-11-01), Ludikhuize
patent: 6211552 (2001-04-01), Efland et al.
patent: 6376891 (2002-04-01), Nagatani et al.
patent: 6475870 (2002-11-01), Huang et al.
patent: 6531355 (2003-03-01), Mosher et al.
patent: 6548874 (2003-04-01), Morton et al.
patent: 6729886 (2004-05-01), Efland et al.
patent: 6734493 (2004-05-01), Chen et al.
patent: 2002/0053695 (2002-05-01), Liaw et al.
patent: 2004/0079991 (2004-04-01), Lin et al.
patent: 2005/0001672 (2005-01-01), Scott et al.
U.S. Appl. No. 10/880,907, filed Jun. 30, 2004, Pendharkar, Entire Document.
U.S. Appl. No. 10/890,648, filed Jul. 14, 2004, Pendharkar, Entire Document.
U.S. Appl. No. 10/302,256, filed Nov. 22, 2002, Hower et al., Entire Document.

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