Double spacer salicide MOS device and method

Details Double spacer salicide MOS device and method Double spacer salicide MOS device and method

1992-06-03

1993-05-04

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257346, 257408, 257900, H01L 2910, H01L 2978, H01L 2348

Patent

active

052084728

ABSTRACT:
A method of forming a self-aligned metal oxide semiconductor (MOS) structure is described. Multilayer dielectrics are used at the edge of the gate electrode, and the gate electrode, the source and the drain have metal silicide regions. The first layer of dielectric is used to define a lightly doped drain (LDD) structure and the second dielectric layer serves to extend the oxide region at the gate edge and to improve the source/drain junction leakage property and to reduce the shorting percentage of gate to source/drain. A special device structure with extended lateral diffusion of junction under the oxide at the gate edge will be performed by using this method.

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Stanley Wolf Ph.D et al., Silicon Processing for The VLSI Era, vol. 1, Process Technology, Chapter 8, "Diffusion in Silicon", Lattice Press, pp. 242-279, Jun. 1987.

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