Double-sided extended drain field effect transistor

Details Double-sided extended drain field effect transistor Double-sided extended drain field effect transistor

2007-10-09

2007-10-09

Jackson, Jerome (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S335000, C257S492000, C257S493000, C257S494000, C257S496000

Reexamination Certificate

active

11010892

ABSTRACT:
A double-sided extended drain field effect transistor that includes a gate terminal overlying a channel region in a substrate. The substrate includes a drain region of a first carrier type that is laterally separated from the channel region by a first RESURF region of the first carrier type, and a source region of the first carrier type that is laterally separated from the channel region by a second RESURF region of the first carrier type. Regions of the first carrier type may also be disposed laterally adjacent to the source and drain regions on the opposite lateral side as compared to the RESURF regions. This configuration improves the reverse bias breakdown voltage of the transistor.

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