Double-side polishing process with reduced scratch rate and...

Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means

Reexamination Certificate

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C438S692000, C438S693000

Reexamination Certificate

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06645862

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a double-side polishing process for semiconductor wafers, which are used in particular in industry for the fabrication of microelectronic components. The invention also relates to a device which is suitable for carrying out the process.
2. The Prior Art
Technological progress in the fabrication of microelectronic components, for example processors and memory components, requires the provision of single-crystal semiconductor wafers as a platform. These wafers have to satisfy increasingly stringent specifications. Specifications of this type relate to the crystal quality, and relate to the surface, in particular the front surface which is intended for component fabrication, and relate to the geometry and to the nano-topography of wafers of this type.
Conventional single-side polishing processes are no longer sufficient to produce semiconductor wafers which satisfy increasingly stringent geometry and nano-topography requirements. Moreover, the users of modern component processes increasingly demand not only a polished front surface on which the components are placed but also a polished back surface. This back surface binds fewer particles than, for example, an etched back surface. Therefore this back surface reduces the component failure rate caused by electric short circuits which are due to cross-contamination. For this reason, equipment and processes have been provided and developed further for the simultaneous polishing of front and back surfaces of the semiconductor wafer using what is known as the double-side polishing process. This equipment and these processes are nowadays being increasingly used in particular for the industrial manufacture of semiconductor wafers with diameters of 200 mm and 300 mm. The semiconductor wafers are moved in carriers made from metal or plastic, which carriers have suitably dimensioned cutouts. The carriers are moved over a path which is predetermined by the machine and process parameters between two rotating polishing plates. These plates are covered with polishing cloth, in the presence of a polishing abrasive, and as a result the wafers are polished, so that a high plane parallelism is achieved.
According to the prior art, which results, for example, from U.S. Pat. No. 4,974,370, the carriers are moved as follows. This is done either by means of an involute gear teeth, in which carrier gears and both outer and inner drive gears of the polishing machine come into engagement. Alternatively, this is done by pin wheel gears, in which case the carrier is surrounded by generally semicircular cutouts, in which pins of the outer and inner gears, belonging to drive gears, engage. During the polishing, the polishing abrasive flows continuously out of a stationary supply in the central axis of the polishing machine onto an open polishing-abrasive ring channel. This is attached to the upper polishing plate and therefore rotates, and from which it is passed, by means of hoses or tubes, through bores in the plate, to the semiconductor wafers which are to be polished.
As with single-side polishing processes, suitable polishing abrasives for double-side polishing are alkaline suspensions of abrasive substances, for example SiO
2
colloids in combination with alkaline components in water. Polishing abrasives of this type and their production, as well as suitable supply systems, are described, for example, in DE 197 15 974 A1, DE 198 17 087 A1, EP 959 116 A2 and U.S. Pat. No. 6,027,669.
A double-side polishing process for achieving improved planarity is described in 199 05 737 C2. By way of example, carriers made from chromium steel, which form the subject matter of the German patent application which bears the reference number DE 100 23 002.4, are suitable for this purpose. To avoid damage to the edges during polishing, it has proven appropriate to line the cutouts in the carriers which are intended to receive the semiconductor wafer with plastic, for example as described in EP 208 315 B1. However, different factors of influence, for example coagulation, and as a result crystallization of the polishing abrasive cause crystallites to form in the open supply under the action of ambient air. In addition, abrasion of polishing-abrasive deposits and extremely small metal particles can be formed on the drive gears and constantly cause scratches on the polished semiconductor wafers. These scratches can only be removed to a certain extent by expensive further polishing and lead to increased levels of scrap.
A person skilled in the art is aware that the treatment of polishing cloths by means of brush plates to clean away particles can be carried out between two polishing runs. In the case of double-side polishing, the use of this process has had only limited success, since there is a continuous supply of particles from the polishing-abrasive ring channel and/or from the gears. Manual cleaning of these components generally only provides a remedy for a short time.
EP 787 562 B1 has described a double-side polishing process which is distinguished by the fact that at least part of the carrier mount and of the pin or gear drive are produced from a hard resin material. Although this process reduces the risk of scratches being formed by metal particles, it has no effect on the formation of scratches caused by encrusted polishing abrasive flaking or being rubbed off. WO 00/39841 describes the storage of the carriers for double-side polishing under water between the polishing runs. This is done in order to prevent polishing abrasive from drying on the carriers, and therefore to prevent the formation of scratches, but the same restriction as that referred to above applies.
The prior art has not hitherto disclosed any process for the double-side polishing of semiconductor wafers which ensures a constantly low scratch rate.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a process for the double-side polishing of semiconductor wafers which ensures a constantly low scratch rate.
The above object is achieved by the invention which provides a process for producing semiconductor wafers by double-sided polishing between two rotating, upper and lower polishing plates, which are covered with polishing cloth, while an alkaline polishing abrasive with colloidal solid fractions is being supplied, the semiconductor wafers being guided by carriers which have circumferential teeth and are set in rotation by complementary outer and inner gears of the polishing machine, in which the following process steps are simultaneously carried out during the polishing of the semiconductor wafers:
(a) at least one of the two sets of gears of the polishing machine is at least from time to time sprayed with a liquid which substantially comprises water,
(b) the alkaline polishing abrasive is fed continuously to the semiconductor wafers in a closed supply device.
The present invention is further directed to a polishing machine for the double-sided polishing of semiconductor wafers, comprising an upper polishing plate and a lower polishing plate, each plate of which is covered with polishing cloth, carriers for receiving semiconductor wafers and a drive with external and internal gear teeth for turning the carriers, which machine has means for spraying at least one of the two sets of gears with a liquid and a closed system for supplying a polishing abrasive to the semiconductor wafers.
An essential feature of the invention is that, by preventing the polishing abrasive supplied from drying out, crystallization of the colloid, which leads to scratches being formed on the surfaces of the semiconductor wafers, is avoided. The fact that only the combination of the measures of (a) wetting of the outer and/or inner gear teeth of the polishing machine and (b) using a closed polishing-abrasive supply, which prevent the polishing abrasive from drying out, considerably reduces the scratch rate on the semiconductor wafers. This is unexpectedly surprising and was impossible to predict.
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