Double poly high density buried bit line mask ROM

Details Double poly high density buried bit line mask ROM Double poly high density buried bit line mask ROM

1994-12-05

1996-11-26

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257402, 257797, H01L 2976

Patent

active

055788572

ABSTRACT:
In accordance with the invention, a double poly process is used to double the memory density of a buried bit line ROM on the same silicon area. In particular the word-line pitch is decreased to increase the cell density in a direction perpendicular to the word lines. The invention uses a self-aligned method for ROM code implantation and a polyplanarization by chemical-mechanical polishing (CMP) to achieve a self aligned double poly word line structure.

REFERENCES:
patent: 5067001 (1991-11-01), Choi
patent: 5317534 (1994-05-01), Choi et al.
patent: 5394356 (1995-02-01), Yang

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