Double operation speed in DRAM with new memory cell...

Details Double operation speed in DRAM with new memory cell... Double operation speed in DRAM with new memory cell...

2005-01-25

2005-01-25

Nguyen, Van Thu (Department: 2824)

Static information storage and retrieval

Systems using particular element

Ferroelectric

C365S063000, C365S072000

Reexamination Certificate

active

06847538

ABSTRACT:
Information processing speed is increased to about two times the speed in the related art. Even defects are partially included, memory cells other than the defective ones effectively used such that memory ICs with an enhanced yield are provided. A memory IC having bit lines through which data can be written and read at pairs of memory cells, is equipped with a pair of N-type MOS transistor N-Tr1 and P-type MOS transistor P-Tr2 that have gates commonly connected to each identical one of the word lines, and either sources thereof or drains thereof commonly connected to each identical one of the bit lines, capacitors that have electrodes on one side thereof respectively connected to the sources or the drains of the transistors that are not connected to the bit line BL and electrodes on the other side thereof commonly connected to a plate electrode of the memory IC, and an operation circuit that freely, selectively writes and reads data in and from either one of the one pair of the memory cells.

REFERENCES:
patent: 6028784 (2000-02-01), Mori et al.

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