Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
Reexamination Certificate
2005-03-08
2005-03-08
Pham, Long (Department: 2814)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
On insulating substrate or layer
C438S257000, C438S269000, C438S283000, C438S300000, C257S347000
Reexamination Certificate
active
06864129
ABSTRACT:
A double gate MOSFET transistor and a method for fabricating it are described. In this case, a semiconductor layer structure of a transistor channel to be formed is embedded in a spacer material and contact-connected by source and drain regions which are filled into depressions that are etched on opposite sides of the semiconductor layer structure. Afterwards, the spacer material is etched out selectively and replaced by the electrically conductive gate electrode material.
REFERENCES:
patent: 5072276 (1991-12-01), Malhi et al.
patent: 5120666 (1992-06-01), Gotou
patent: 5461250 (1995-10-01), Burghartz et al.
patent: 5604368 (1997-02-01), Taur et al.
patent: 5646058 (1997-07-01), Taur et al.
patent: 5753541 (1998-05-01), Shimizu
patent: 5965914 (1999-10-01), Miyamoto
patent: 6004837 (1999-12-01), Gambino et al.
patent: 6207530 (2001-03-01), Hsu et al.
patent: 6316296 (2001-11-01), Sakamoto
patent: 6365465 (2002-04-01), Chan et al.
patent: 6413802 (2002-07-01), Hu et al.
patent: 44 33 086 (1995-03-01), None
patent: 198 03 479 (1998-12-01), None
patent: 0 612 103 (1994-08-01), None
patent: 0 704 909 (1996-04-01), None
Colinge, J.P. et al.: “Silicon-On-Insulator ‘Gate-All-Around Device’”, IEDM 1990, pp. 595-598.
Wong, Hon-Sum Philip et al.: “Self-Aligned (Top and Bottom) Double-Gate MOSFET with a 25 nm Thick Silicom Channel”, IEDM 1997, pp. 427-430.
Pikus, F.G. et al.: “Nanoscale field-effect transistors: An ultimate size analysis”, Appl. Phys. Lett. 1971, vol. 25, Dec. 22, 1997, pp. 3661-3663.
Risch Lothar
Rösner Wolfgang
Schulz Thomas
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Pham Long
Rao Shrinivas
LandOfFree
Double gate MOSFET transistor and method for the production... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Double gate MOSFET transistor and method for the production..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Double gate MOSFET transistor and method for the production... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3379701