Double DRAM bit steering for multiple error corrections

Details Double DRAM bit steering for multiple error corrections Double DRAM bit steering for multiple error corrections

2008-08-07

2010-11-23

Abraham, Esaw T (Department: 2112)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Replacement of memory spare location, portion, or segment

C714S006130, C714S718000, C714S758000, C714S763000, C714S799000, C365S200000, C365S201000

Reexamination Certificate

active

07840860

ABSTRACT:
A method and system is presented for correcting a data error in a primary Dynamic Random Access Memory (DRAM) in a Dual In-line Memory Module (DIMM). Each DRAM has a left half (for storing bits0:3) and a right half (for storing bits4:7). A determination is made as to whether the data error was in the left or right half of the primary DRAM. The half of the primary DRAM in which the error occurred is removed from service. All subsequent reads and writes for data originally stored in the primary DRAM's defective half are made to a half of a spare DRAM in the DIMM, while the DRAM's non-defective half continues to be used for subsequently storing data.

REFERENCES:
patent: 5267242 (1993-11-01), Lavallee et al.
patent: 5923682 (1999-07-01), Seyyedy
patent: 5974564 (1999-10-01), Jeddeloh
patent: 6119049 (2000-09-01), Peddle
patent: 6418068 (2002-07-01), Raynham
patent: 6473449 (2002-10-01), Cafarella et al.
patent: 6658076 (2003-12-01), Hayata
patent: 6725414 (2004-04-01), Seyyedy
patent: 6754117 (2004-06-01), Jeddeloh
patent: 6892159 (2005-05-01), Weiss et al.
patent: 7137020 (2006-11-01), Gilstrap et al.

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