Double-diffused semiconductor device

Details Double-diffused semiconductor device Double-diffused semiconductor device

2006-10-24

2006-10-24

Lee, Eugene (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S335000, C257S361000, C257S362000, C257S497000, C257S342000, C257S356000

Reexamination Certificate

active

07126191

ABSTRACT:
A DMOSFET and a method of fabricating the same, capable of keeping a desirable level of drain voltage resistance and, at the same time, of reducing the drain resistance. In a DMOSFET configured as having a drain region composed of an epitaxial layer formed on a P-type semiconductor substrate while placing an N-type buried layer in between, and as having, in the drain region, a P-type body region having an N-type source region nested therein and a drain extraction region, formation of N-type, heavily-doped buried layers prior to the epitaxial growth is proceeded so as not to form them at least in the region under the P-type body region, and so as to make an impurity concentration in the region under the P-type body region smaller than that in the region under a drift region when viewed after the impurity is diffused by the succeeding annealing.

REFERENCES:
patent: 6909143 (2005-06-01), Jeon et al.
patent: 6963109 (2005-11-01), Kikuchi et al.
patent: 2004/0108548 (2004-06-01), Cai
patent: 2005/0062102 (2005-03-01), Dudek et al.
patent: 6-37266 (1994-10-01), None

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