Double-diffused-drain MOS device with floating non-insulator...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C257S412000

Reexamination Certificate

active

07453127

ABSTRACT:
A double-diffused-drain metal-oxide-semiconductor device has a gate structure overlying a semiconductor substrate, a pair of insulator spacers on the sidewalls of the gate structure respectively, and a pair of floating non-insulator spacers embedded in the pair of insulator spacers respectively.

REFERENCES:
patent: 5687113 (1997-11-01), Papadas et al.
patent: 6861689 (2005-03-01), Burnett
patent: 2004/0038461 (2004-02-01), Lee et al.
patent: 2004/0219755 (2004-11-01), Rabkin et al.
patent: 2004/0235305 (2004-11-01), Lojek
patent: 2005/0051836 (2005-03-01), Choi et al.
patent: 2005/0064671 (2005-03-01), Hao et al.
patent: 2006/0073666 (2006-04-01), Lim et al.
patent: 2006/0113627 (2006-06-01), Chen et al.
patent: 2007/0001162 (2007-01-01), Orlowski et al.
“Simple Gate-to-Drain Overlapped MOSFET's Using Poly Spacers for High Immunity to Channel Hot-Electron Degradation” Chen et al.; 1990; pp. 78-81.
“A Sub-Half Micron Partially Gate-to-Drain Overlapped MOSFET Optimized for High Performance and Reliability” Chen et al.; 1991; pp. 545-548.
TW Office Action mailed Apr. 2, 2008.

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