Double density V nonvolatile memory cell

Details Double density V nonvolatile memory cell Double density V nonvolatile memory cell

1998-02-19

1999-07-13

Thomas, Tom

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257314, 257321, 257324, H01L 2976, H01L 2988, H01L 29788, H01L 29792

Patent

active

059230630

ABSTRACT:
Floating gates of nonvolatile memory cells are formed in pairs within a pyramidal or truncated pyramidal opening in a semiconductor layer between a top surface thereof and a heavily doped source region spaced from the surface of the semiconductor layer. The floating gates control the conductance of channel regions formed along the sloped sidewalls of the pyramidal openings between surface drains and the buried source region.

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