Double density MROM array structure

Details Double density MROM array structure Double density MROM array structure

1997-03-28

1998-10-27

Munson, Gene M.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257 66, 365104, H01L 27112, H01L 29786, G11C 1712

Patent

active

058281134

ABSTRACT:
A semiconductor mask-programmable read-only-memory array structure provides double density storage of data information by means of thin film memory cell transistors formed on both sides of a layer of thin film polysilicon. At a bottom surface of a layer of thin film polysilicon which has a bottom gate oxide grown thereon, a plurality of polysilicon bottom cell wordlines intersects a plurality of bitlines to form an array of bottom cell memory transistors. The bitlines are heavily-doped diffusion regions within the layer thin film polysilicon. Additionally, a top surface of the layer of thin film polysilicon has a top gate oxide grown thereon. Over this top gate oxide, a plurality of polysilicon top cell wordlines intersects the plurality of bitlines to form an array of top cell memory transistors, thereby producing a NOR-type read-only-memory array structure with double the storage density of conventional, prior art structures.

REFERENCES:
patent: 5383149 (1995-01-01), Hong
patent: 5490106 (1996-02-01), Tasaka
patent: 5539234 (1996-07-01), Hong
patent: 5578857 (1996-11-01), Hong et al.

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