Double dense ferroelectric capacitor cell memory

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

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257295, 257298, 257312, 257532, 257595, 365145, H01L 27108, G11C 1122

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active

056400306

ABSTRACT:
A semiconductor memory is provided wherein two bits of binary information are stored simultaneously in a ferroelectric capacitor by utilizing the positive and negative polarization states of the ferroelectric capacitor for storing a first of the two bits of binary information and by utilizing the capacitive characteristic of the ferroelectric capacitor to simultaneously store a second of the two bits of binary information without altering the polarization of the ferroelectric capacitor. When reading information from the ferroelectric capacitor, the second of the two bits of information is read out first and transferred to a buffer cell, then the first of the two bits of binary information is read and re-written, as desired, and the second of the two bits of information is returned from the buffer cell to the ferroelectric capacitor.

REFERENCES:
patent: 4055837 (1977-10-01), Stein et al.
patent: 5038323 (1991-08-01), Schwee
patent: 5121353 (1992-06-01), Natori
patent: 5136534 (1992-08-01), McDavid et al.
patent: 5163021 (1992-11-01), Mehrotra et al.
patent: 5250827 (1993-10-01), Inoue et al.
patent: 5291436 (1994-03-01), Kamisawa
"A Ferroelectric DRAM Cell for High Density NVRAMS" by R. Moazzami et al, VLSI Symposium, May 1990, pp. 15 and 16.

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