Double damascene pattering of silcon-on-insulator transistors

Details Double damascene pattering of silcon-on-insulator transistors Double damascene pattering of silcon-on-insulator transistors

1997-10-01

1999-10-19

Bowers, Charles

Semiconductor device manufacturing: process

Formation of semiconductive active region on any substrate

On insulating substrate or layer

438149, 438166, H01L 2100, H01L 2120

Patent

active

059703679

ABSTRACT:
The present invention is a technique for producing silicon-on-insulator MOS transistors by damascene patterning of source-drain regions in a thin film of amorphous silicon deposited on a layer of oxide grown on a silicon wafer, where the oxide has previously been etched with a pattern of trenches. In addition, the technique provides for the amorphous layer to contact the underlying silicon substrate through multiple small oxide openings; where these openings have been previously filled with amorphous silicon, planarized and annealed at high temperature to form single crystal silicon; and where subsequent transistor channel regions will align to these filled openings. After patterning, the wafer is annealed in a second high temperature cycle, where the regions of amorphous silicon in contact with the single crystal silicon in the openings will convert into single crystal silicon suitable for transistor channel regions.

REFERENCES:
patent: 4952526 (1990-08-01), Pribat et al.
patent: 5417180 (1995-05-01), Nakamura
patent: 5565029 (1996-10-01), Takasu
patent: 5668046 (1997-09-01), Koh et al.
patent: 5874328 (1999-02-01), Liu et al.
patent: 5882958 (1999-03-01), Wanlass
L. Jastrzebski, SOI by CVD: Epitaxial Lateral Overgrowth (ELO) Process--Review, Journal of Crystal Growth, 63, p. 493, 1983.
McD. Robinson, D. J. Lischner and G. K. Celler, "Large Area Recrystallization of Polysilicon with Tungsten-Halogen Lamps" Journal of Crystal Growth, 63, p. 484, 1983.
John C. C. Fan, B.-Y. Tsaur and M. W. Geis, "Graphite-Strip-Heater Zone-Melting recrystallization of Si Films", Journal of Crystal Growth, 63 p. 453, 1983.

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