Double capacity stacked memory and fabrication method thereof

Details Double capacity stacked memory and fabrication method thereof Double capacity stacked memory and fabrication method thereof

2003-04-28

2004-11-30

Ho, Hoai (Department: 2818)

Static information storage and retrieval

Hardware for storage elements

C365S230030, C365S063000

Reexamination Certificate

active

06826067

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a memory device, and in particular to a double capacity stacked memory device with four data input/output terminals suitable for double capacity memory application in a standard package.
2. Description of the Related Art
Because of process technology limitations, the maximum capacity of memory devices can be limited. Furthermore, process technology for small capacity memory devices (256 Mb) is, usually, more stable at lower costs than large capacity memory devices (512 Mb). Thus, it is desirable to obtain a large capacity memory device by stacking small capacity memory devices in one package.
SUMMARY OF THE INVENTION
Accordingly, an object of the invention is to provide a double capacity stacked memory device and method of fabricating the same. This stacked memory device is suitable for double capacity memory device in a standard package regardless of pins or signals from external circuit, thereby obtaining a memory device with doubled capacity.
According to the above mentioned object, the invention provides a stacked memory with four data input/output terminals suitable for double capacity memory device in a standard package.
In the stacked memory of the present invention, a first memory chip has a plurality of control terminals, a plurality of address terminals and two data input/output terminals. A second memory chip has a plurality of control terminals, a plurality of address terminals and two data input/output terminals, wherein the control terminals of the first memory chip are electrically coupled to the control terminals of the second memory chip correspondingly to serve as control terminals of the stacked memory, the address terminals of the first memory chip are electrically coupled to the address terminals of the second memory chip correspondingly to serve as address terminals of the stacked memory, and the two data input/output terminals of the first memory chip and second memory chip construct four data input/output terminals of the stacked memory, such that the stacked memory accesses data in the first and second memory chip simultaneously according to an access command.
According to the above mentioned objects, the present invention provides a method for fabricating a double capacity stacked memory with four data input/output terminals suitable for double capacity memory device in a standard package.
In the method of the present invention, first and second memory chips are provided, each with a plurality of control terminals and address terminals and two input data input/output terminals. Next, the control terminals of the first memory chip are electrically coupled to the control terminals of the second memory chip correspondingly to serve as control terminals of the stacked memory. The address terminals of the first memory chip are then electrically coupled to the address terminals of the second memory chip correspondingly to serve as address terminals of the stacked memory. Finally, the two data input/output terminals of the first memory chip and second memory chip serve as four data input/output terminals of the stacked memory.
A detailed description is given in the following embodiments with reference to the accompanying drawings.


REFERENCES:
patent: 4797850 (1989-01-01), Amitai
patent: 6111775 (2000-08-01), Schaefer

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