Dopant implant for conductive charge leakage layer for use with

Active solid-state devices (e.g. – transistors – solid-state diode – With means to control surface effects – With inversion-preventing shield electrode

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257632, 257645, 257651, 257660, 257788, 437141, 437235, 437236, 437240, H01L 2934, H01L 2122

Patent

active

054061164

ABSTRACT:
A layer of dopant is implanted in the passivation of a semiconductor die to facilitate testing of the die by a scanning electron microscope voltage contrast system. The layer of dopant is capacitively coupled to circuits under the passivation and is coupled to ground to allow charge to bleed to ground through a high resistivity path. The resistivity is low enough to allow E-beam charge bleed off, but not bleed off of higher frequency capacitive coupled signals. The disclosure is also applicable to photo generated electron voltage contrast.

REFERENCES:
patent: 3518494 (1970-06-01), James
patent: 4124863 (1978-11-01), Mason
patent: 5005064 (1991-04-01), Yoshino et al.

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