Domino logic compatible scannable flip-flop

Details Domino logic compatible scannable flip-flop Domino logic compatible scannable flip-flop

2006-02-21

2006-02-21

Cho, James H. (Department: 2819)

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

C326S093000

Reexamination Certificate

active

07002374

ABSTRACT:
A testable, prechargeable circuit has a driving circuit for producing a driving circuit output signal. A timing circuit receives a clock signal and the driving circuit output signal to cause an output of the testable, prechargeable circuit to be in a low state when the clock signal is low. The timing circuit also causes the output of the circuit to be timed with a state change in the clock signal to provide a domino logic output signal. Either a data signal or a test signal are multiplexed to the input of the driving circuit to produce respectively the domino logic output signal or a test output signal. A static logic circuit receives the test output signal to produce a test signal output.

REFERENCES:
patent: 5041742 (1991-08-01), Carbonaro
patent: 5694362 (1997-12-01), Zhang et al.
patent: 5883529 (1999-03-01), Kumata et al.
patent: 6686776 (2004-02-01), Sakata et al.

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