Domino logic circuit having a clocked precharge

Details Domino logic circuit having a clocked precharge Domino logic circuit having a clocked precharge

1998-03-02

2000-08-15

Tokar, Michael

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

Field-effect transistor

326112, 326 83, 327534, H03K 19096, H03K 190175, H03K 301

Patent

active

061042137

ABSTRACT:
A domino logic circuit having a clocked precharge is disclosed. The domino logic circuit includes a precharge transistor, a discharger transistor, several input transistors, and an invertor. Connected to a power supply, the precharge transistor receives a first clock input. The discharge transistor, connected to the ground, receives a second clock input. The input transistors is coupled between the precharge transistor and the discharge transistor. Each of the input transistors receives a signal input. The inverter has an input coupled to the precharge transistor, and an output to yield a signal output. The inverter includes a first transistor and a second transistor connected in series, and the output of the inverter is connected to a body of the first transistor.

REFERENCES:
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patent: 4656417 (1987-04-01), Kirkpatrick et al.
patent: 4668880 (1987-05-01), Shoji
patent: 5004936 (1991-04-01), Andresen
patent: 5015882 (1991-05-01), Houston et al.
patent: 5434526 (1995-07-01), Tanigshira et al.
patent: 5552723 (1996-09-01), Shigehara et al.
patent: 5821769 (1998-10-01), Douseki

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