DMA transfer of an interleaved stream

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

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Details

348423, G06F 1328, H04N 712

Patent

active

060062878

ABSTRACT:
A DMA transfer system includes a multiplexer for multiplexing DMA requests from a plurality of processors, a flag for changing over between an operation in which a stream ID is removed from a data stream before the data stream is transferred to a requesting processor or an operation in which the data stream is transferred to the requesting processor with the stream ID left added on, ID registers the number of which is the same as the number of processors, acknowledge controllers, the number of which is the same as the number of processors and which are provided to correspond to respective ones of the processors, for controlling a DMA acknowledge signal and access control signal to the processors in accordance with DMA acknowledge signals from a DMA controller, and a stream ID detector for comparing stream IDs in the stream ID registers and data streams transferred by DMA, switching between enabling/disabling of the acknowledge controllers based upon the value of the flag and results of comparison, and outputting a data stream.

REFERENCES:
patent: 5388237 (1995-02-01), Sodos
patent: 5715176 (1998-02-01), Mobini

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