DMA engine

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Details

C710S020000, C710S021000, C710S023000

Reexamination Certificate

active

07996581

ABSTRACT:
A circuit and corresponding method for transferring data. The circuit comprises: a CPU; a plurality of addressable devices; and a DMA engine coupled to the CPU and to those devices, the DMA engine comprising a plurality of DMA contexts each having fetch circuitry for fetching a DMA descriptor indicated by the CPU and transfer circuitry for transferring data from one to another of the devices based on a fetched descriptor. The DMA engine further comprises switching means operable to control a group of the contexts to alternate in a complementary sequence between fetching and performing a transfer, such that alternately one or more contexts in the group fetch while one or more others perform a transfer.

REFERENCES:
patent: 5894560 (1999-04-01), Carmichael et al.
patent: 6408354 (2002-06-01), Young
patent: 7318090 (2008-01-01), Fairman et al.
patent: 2002/0052987 (2002-05-01), Collier
patent: 2005/0091390 (2005-04-01), Helmer, Jr. et al.
patent: 2006/0179180 (2006-08-01), Sugita et al.
patent: 2008/0222317 (2008-09-01), Go et al.
patent: W02006/117562 (2006-11-01), None

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