DMA doorbell

Details DMA doorbell DMA doorbell

2001-05-31

2004-05-11

Elamin, A. (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S022000, C710S023000, C710S052000

Reexamination Certificate

active

06735642

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to computer systems, and specifically to devices and methods for direct memory access (DMA) in such systems.
BACKGROUND OF THE INVENTION
Direct memory access (DMA) is an efficient means for transferring data to and from a memory without direct involvement of a central processing unit (CPU). A DMA engine performs the desired data transfer operations as specified by DMA commands, known as descriptors. The descriptors typically indicate, for each operation, a source address from which to read the data, and a destination address to which the data are to be written. The descriptors are commonly organized in memory as a linked list, or chain, in which each descriptor contains a field indicating the address in the memory of the next descriptor to be executed. The last descriptor in the list has a null pointer in the “next descriptor” field, indicating to the DMA engine that there are no more commands to be executed, and DMA should become idle once it has reached the end of the chain.
In order to initiate a chain of DMA data transfers, an application program running on a CPU prepares the appropriate chain of descriptors in a memory accessible to the DMA engine. The CPU then sends a message to the DMA engine indicating the memory address of the first descriptor in the chain, which is a request to the DMA engine to start execution of the descriptors. The application typically sends the message to the “doorbell” of the DMA engine—a control register with a certain bus address that is specified for this purpose. Sending such a message to initiate DMA execution is known as “ringing the doorbell” of the DMA engine. The DMA engine responds by reading and executing the first descriptor. It then updates a status field of the descriptor to indicate to the application that the descriptor has been executed. The engine follows the “next” field through the entire linked list, marking each descriptor as executed, until it reaches the null pointer in the last descriptor. After executing the last descriptor, the DMA engine becomes idle and is ready to receive a new list for execution.
While the DMA engine is executing one chain, the application program may prepare a new chain for execution. This situation occurs frequently in computer network applications, in which DMA is used to transfer newly-arrived data from an incoming connection, such as an Ethernet link, to the computer's local memory, or from the memory to an outgoing connection. When the new chain is ready, the program can, in principle, link it to the previous chain, which is already in execution by the DMA engine, by modifying the “next” field in the last descriptor of the previous chain so that it points to the first descriptor in the new chain. The problem with this approach is that by the time the application has updated the “next” field of the last descriptor, the DMA engine may have already read this descriptor. (This case is particularly likely to occur in modern DMA engines, which use pipeline architectures to pre-fetch, read and process multiple descriptors at once.) In such a case, the DMA engine will not notice that the last descriptor has been updated, and it will therefore simply go idle after executing this last descriptor without reading the first descriptor in the new chain.
In order to avoid such a situation, the application program must generally synchronize its operation with the DMA engine each time it submits (or appends) a new chain of descriptors. One approach to synchronization is for the program to wait until the DMA engine has become idle before ringing its doorbell to notify it of the new chain. For example, the program may check periodically to determine when the DMA engine has flagged the last descriptor in the previous chain as having been executed as a sign that the engine is idle. The program must make sure that the engine has actually become idle before it rings the doorbell again, because of the inherent limitations of the doorbell as a hardware resource. If the doorbell rings before the previous chain has finished executing, the DMA engine will presumably ignore it. An explicit synchronization mechanism is typically needed in order to avoid this situation, since the application software typically prepares new descriptors at a pace that is different from the rate of execution of the descriptors by the DMA engine.
As an addition possibility, the program may check the earlier descriptors in the previous chain to see when they are flagged, so as to judge how far the DMA engine may be from the end of the chain. If the engine is far from the end of the chain, the program will presumably have time to update the “next” field of the last descriptor before it is read by the DMA engine. This approach is risky, however, in view of the pre-fetch and pipelining capabilities of advanced DMA engines mentioned above. It also requires that the same software process be used both to create the descriptor lists and to track their completion status.
Thus, there is inherent inefficiency in the design of DMA engines known in the art. The possible synchronization processes described above are time-consuming and add overhead to application program operations. Furthermore, waiting for the DMA engine to become idle requires that the DMA pipeline be flushed, which wastes DMA resources and impacts negatively on its performance. In order to minimize the relative burden of synchronization overhead, the application software can be made to prepare longer lists of descriptors before ringing the doorbell. This approach, however, has the added disadvantage of increasing the latency of data transfer service.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide improved methods and devices for direct memory access (DMA).
It is a further object of some aspects of the present invention to provide an improved DMA doorbell mechanism.
In preferred embodiments of the present invention, a DMA engine is provided with a doorbell whose resources are substantially unlimited, in the sense that the doorbell may be rung multiple times without loss of data and without executing the same descriptor multiple times. When an application program prepares a new chain of descriptors for execution by the DMA engine, it modifies the “next” field in the last descriptor of the preceding chain so as to point to the first descriptor in the new chain, and then it rings the doorbell. Whenever the doorbell is rung, the DMA engine sets a flag, or if the flag is already set, it leaves the flag unchanged. When the engine reaches the point of executing the last descriptor in its current chain, and it finds that the doorbell flag is set, the engine rereads the “next” field of the last descriptor in order to determine whether it has been changed to point to a new chain. Only when the “next” field still contains a null pointer upon rereading does the DMA engine go idle and clear the doorbell.
This new type of doorbell, as provided by preferred embodiments of the present invention, relieves the application software entirely of the need to synchronize its activities with the state of the DMA engine. It allows an existing chain of DMA descriptors to be extended reliably regardless of the state of the DMA engine itself. Thus, the performance of the software is improved, due to the elimination of synchronization overhead. The performance of the DMA engine is enhanced, as well, since there is never a need to wait for the engine to go idle before starting a new chain of descriptors. As a result, the latency of DMA service is minimized.
Although preferred embodiments are described herein with reference to DMA operations, the principles of the present invention may be extended to the more general case of synchronizing between processes of other types. These principles are applicable, for example, in situations in which a first process prepares a worklist for second process, and then rings a doorbell to alert the second process. Based on the doorbell mechanism of the present invention, the first proces

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