DMA device having plural buffers storing transfer request...

Details DMA device having plural buffers storing transfer request... DMA device having plural buffers storing transfer request...

2009-08-11

2011-11-22

Chen, Alan (Department: 2182)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S036000, C710S040000, C710S052000

Reexamination Certificate

active

08065449

ABSTRACT:
A Direct Memory Access (DMA) device includes a first buffer which holds a first transfer information required for a first transfer request, and a second buffer which holds a second transfer information required for a second transfer request, and a transfer request comparison circuit which determines whether or not a current transfer request, which is newly inputted, matches with the first transfer request or the second transfer request. The DMA device includes a priority determination circuit that, in case where the transfer request comparison circuit determines that the current transfer request is not matched with the first transfer request or the second transfer request, updates the second transfer information to a transfer information for the current transfer request when a priority of the current transfer request is higher than a priority of the second transfer request, and updates the first transfer information to the transfer information for the current transfer request when the priority of the current transfer request is lower than the priority of the second transfer request.

REFERENCES:
patent: 6557052 (2003-04-01), Kubo
patent: 2006/0080478 (2006-04-01), Seigneret et al.
patent: 2000-99452 (2000-04-01), None

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