DMA controller having a trace buffer

Electrical computers and digital data processing systems: input/ – Input/output data processing – Direct memory accessing

Reexamination Certificate

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Details

C710S028000, C710S015000, C714S045000

Reexamination Certificate

active

07143205

ABSTRACT:
A DMA controller comprises an arbitration unit for arbitrating among a plurality of channels so as to select a DMA request from among a plurality of DMA requests accepted by way of the plurality of channels according to priorities assigned to the plurality of channels in advance, and a trace buffer for storing trace data associated with the DMA request selected by the arbitration unit. The DMA controller can also include a write control unit for enabling or disabling writing of the trace data associated with the DMA request selected by the arbitration unit in the trace buffer.

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