DMA completion processing mechanism

Details DMA completion processing mechanism DMA completion processing mechanism

2005-09-27

2008-08-19

Tsai, Henry (Department: 2184)

Electrical computers and digital data processing systems: input/

Input/output data processing

Direct memory accessing

C710S033000

Reexamination Certificate

active

07415549

ABSTRACT:
According to one embodiment, a storage device is disclosed. The storage device includes a port having one or more lanes and a direct memory access (DMA) Descriptor Manager (DM). The DM generates and tracks completion of descriptors. The DM includes a first completion lookup table to track one or more fields of an input/output (I/O) context received at a first lane.

REFERENCES:
patent: 6108713 (2000-08-01), Sambamurthy et al.
patent: 6782465 (2004-08-01), Schmidt
patent: 7047533 (2006-05-01), Circenis
patent: 7225278 (2007-05-01), Baxter et al.
patent: 2004/0019835 (2004-01-01), Marisetty et al.
patent: 2005/0034045 (2005-02-01), Lueck et al.
patent: 2005/0076164 (2005-04-01), Malalur
patent: 2005/0135421 (2005-06-01), Chang et al.
patent: 2005/0154946 (2005-07-01), Mitbander et al.
patent: 2005/0268136 (2005-12-01), Kostadinov et al.
patent: 2007/0002827 (2007-01-01), Lau et al.
patent: 2007/0011333 (2007-01-01), Lau et al.
patent: 2007/0011548 (2007-01-01), Chemudupati et al.
patent: 2007/0073947 (2007-03-01), Lau et al.
patent: 2007/0074062 (2007-03-01), Chang et al.
Hallack-STampler, “Definition of Managed Objects for SCSI Entities” IETF Standard-working-draft, Internet Engineering Taks Force IETF, CH, vol. ips, No. 7, July p. 5, line 4-9, line 6; figures 1-3.
Krueger, “T1 Network Address Authority (NAA) Naming Format for iSCSI Node Names” IETF Standard, Internet Engineering Task Force, IETF, CH, Feb. 2005, p. 4, line 19-p. 5, line 6.
Maxtor Corporation: “SAS-1.1, ST—T (transport layer for SSP target ports) state machines” Jul. 12, 2004, T10 Technical Committee, XP002407724, Retrieved from the Internet: URL: http://www.t10.org/ftp/t10/document.04/04-137r2.pdf, paragraph [9.2.6.3.3.5.1].
“Non-Final Office Action for U.S. Appl. No. 11/237,448 Mailed on Feb. 4, 2008, 10 Pages.”
“Response to Non-Final Office Action for U.S. Appl. No. 11/237,448, filed Apr. 4, 2008, 14 Pages.”
“Non-Final Office Action for U.S. Appl. No. 11/165,725 Mailed on Mar. 17, 2008, 10 Pages.”
“Non-Final Office Action for U.S. Appl. No. 11/237,454 Mailed on May 22, 2007, 17 Pages.”
“Response to Non-Final Office Action for U.S. Appl. No. 11/237,454, filed Jul. 10, 2007, 10 Pages. ”
“Final Office Action for U.S. Appl. No. 11/237,454 Mailed on Aug. 17, 2007, 18 Pages. ”
“Response to Final Office Action for U.S. Appl. No. 11/237,454, filed Oct. 23, 2007, 10 Pages.”
“Non-Final Office Action for U.S. Appl. No. 11/237,454 Mailed on Dec. 19, 2007, 15 Pages.”
“Response to Non-Final Office Action for U.S. Appl. No. 11/237,454, filed Mar. 3, 2008, 12 Pages.”

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